Electric VLSI
32 videos • 13,396 views • by Efabless
1
4-1 Setting the right scale factor when opening libraries
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2
4-2 Create new libraries using objects (schematics/layout/icons) from other libraries.
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3
4-3 How to create and use icons and use them in schematics/SPICE.
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4
4-4 How to create a new version of a cell
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5
5-1 Layout of an n-well diode and making an icon view
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6
5-2 Schematic and simulation of an RC circuit using an n-well resistor
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7
5-3 Layout of the metal layers and a pad
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8
6-1 Layout of a pad that contains metal2 and metal3
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9
6-2 Layout of a padframe
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10
6-3 Layout of metal1, metal2 pad and overglass
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11
7-1 Making substrate connections
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12
8-1 Layout of an n-well resistor and sizing it for specific resistance
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13
8-2 Layout of a poly1 resistor with contacts to a resistor using bondpads
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14
8-3 Layout of a p+ resistor
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15
8-4 Layout of NMOS and PMOS transistors
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16
8-5 Connecting transistors together
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17
9-1 Schematic and layout of an inverter
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18
9-2 Layout of an ring oscillator
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19
9-3 Layout of a long L MOSFET
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20
10-2 How to layout a 4-to-1 divider using four 10k n-well unit cells
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21
10-1 Quick guide to laying out a long-L device without LVS error by creating an icon
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22
10-3 Layout of a poly1-poly2 capacitor, icon, an RC circuit
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23
19-1 3 terminal and 4 terminal MOSFET symbols, when to use, some SPICE simulations
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24
Tutorial 1 VLSI Electric NAND/NOR Layout Design
Abd Almonam Zahed
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25
Design Entry and Simulation using Electric VLSI: Static CMOS inverter (Layout level).mp4
Chong HennLoong
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26
drawing cmos inverter using electric vlsi cad system
Akhil Lawrence
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27
ELECTRIC-inverter-transient-simulation
Chumnarn Punyasai
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28
Static CMOS Inverter using Electric VLSI (layout and simulation).avi
Chong HennLoong
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29
CMOS inverter Layout using Electric VLSI Software for beginners
VLSI Academic Tutorials by Prashanth Barla
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30
Electric+LTSpice
Germano Penello
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31
Backend Lab 6 : Xor Gate Layout
Eduvance
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32
COMMON DRAIN AMPLIFIER DESIGN AND SCHEMATIC USING ELECTRIC
VLSI Academic Tutorials by Prashanth Barla
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