02:28

Setting up Visual Studio for Assembly MASM

13:04

38 Deadlock Detection Algorithms | Wait for Graph | Bankers Algorithms in Urdu | Hindi

10:04

39 Deadlock Detection Algorithms | Process Termination | Resource Preemption in Urdu | Hindi

18:37

37 Banker's Algorithm for Deadlock Avoidance in Operating System | Urdu Hindi

26:27

36 Resource Allocation Graph (RAG) in Operating System | Urdu Hindi

11:32

35 Methods for Handing Deadlocks in Operating Systems | Urdu Hindi

08:53

34 Necessary Conditions of Deadlocks in Operating System | Urdu Hindi

15:21

33 Deadlocks in Operating Systems | System Model | Urdu Hindi

12:11

33 Decoders 3x8 decoder constructed with two 2x4 decoders in Digital Logic Design Urdu | Hindi

07:50

32 Decoders (3x8 decoder) in Digital Logic Design Urdu | Hindi

14:24

31 Decoders (2x4 decoder) in Digital Logic Design Urdu | Hindi

11:12

32 Readers and Writers Problem in Operating System Urdu | Hindi

14:46

31 Producer Consumer Problem | Bounded Buffer Problem in Operating System Urdu | Hindi

15:34

30 Dining Philosophers Problem | Classical Problems of Synchronization in OS | Urdu | Hindi

12:01

29 Semaphore with no busy waiting | Operating System Based Solution Urdu | Hindi

09:25

28 Semaphore | N Process Solution | Operating System Based Solution Urdu | Hindi

13:37

30 Five variable K map | Karnaugh Map | Urdu Hindi

06:22

29 Don't Care Condition | Karnaugh Map | Example 3 | Urdu Hindi

06:43

28 Don't Care Condition | Karnaugh Map | Example 2 | Urdu Hindi

08:31

27 Don't Care Condition | Karnaugh Map | Example 1 | Urdu Hindi

09:33

26 K map | Karnaugh Map | Sum of Product | Product of Sum | Urdu Hindi

12:14

25 K map | Karnaugh Map | Sum of Product | Product of Sum | Urdu Hindi

15:04

27 Test And Set (Good Solution) | N Process Solution | Hardware Based Solution Urdu | Hindi

10:17

24 K map | Karnaugh Map | 4 Variable Map Example 3 | Simplification of Boolean Function | Urdu Hindi

06:32

23 K map | Karnaugh Map | 4 Variable Map Example 2 | Simplification of Boolean Function | Urdu Hindi

12:32

26 Swap N Process Solution Hardware Based Solution Urdu | Hindi

11:23

22 K map | Karnaugh Map | 4 Variable Map Example 1 | Simplification of Boolean Function | Urdu Hindi

06:55

21 K map | Karnaugh Map | 3 Variable Map Example 3 | Simplification of Boolean Function | Urdu Hindi

09:55

20 K map | Karnaugh Map | 3 Variable Map Example 2 | Simplification of Boolean Function | Urdu Hindi

11:45

19 K map | Karnaugh Map | 3 Variable Map Example 1 | Simplification of Boolean Function | Urdu Hindi

16:45

18 K map | Karnaugh Map | 2 Variable Map | Simplification of Boolean Function | Urdu Hindi

09:27

25 Test And Set N Process Solution Hardware Based Solution Urdu Hindi

12:19

24 Algorithm 3 Peterson Solution using turn and Flag Two Process Solution Urdu Hindi

33:31

17 Sum of Product SOP and Product of Sum POS in Digital Logic Design Urdu Hindi

17:50

23 Algorithm 2 using Flag Two Process Solution for Critical Problem Urdu Hindi

18:31

22 Algorithm 1 using Turn variable Two Process Solution for Critical Problem Urdu Hindi

12:36

16 TinkerCad Circuit Simulator for Digital Logic Design and Electronics Urdu Hindi

17:35

15 Logicly Circuit Simulator for Digital Logic Design and Electronics Urdu Hindi

24:04

14 CEDAR Circuit Simulator for Digital Logic Design and Electronics Urdu Hindi

18:47

21 Criteria for Good Solution for Critical Section Mutual Exclusion Progress Bounded Waiting

19:21

13 Logic Diagram by using Logical Gates in Digital Logic Desgin DLD Urdu Hindi

19:05

12 Minimize Boolean expressions in Digital Logic Design DLD Urdu Hindi

13:29

20 Process Synchronization Race Condition Critical Section in Operating System Urdu Hindi

09:06

19 Multilevel Feedback Queue CPU Scheduling Algorithm in Operating System Urdu Hindi

20:23

11 Boolean Function Truth table in Digital Logic Design DLD Urdu Hindi

06:33

18 Multilevel Queue CPU Scheduling Algorithm in Operating System Urdu Hindi

02:13

17 Practice Assignment Round Robin and SRTF CPU Scheduling Algorithm in Operating System Urdu Hind

21:56

16 Round Robin with priority CPU Scheduling Algorithm in Operating System Urdu Hindi

13:36

15 Round Robin Preemptive CPU Scheduling Algorithm in Operating System Urdu Hindi

12:55

10 Division in Binary Octal Hexadecimal Urdu Hindi

11:42

9 Multiplication in Binary Octal Hexadecimal Urdu Hindi

11:33

8 Subtraction in Binary Octal Hexadecimal Urdu Hindi

10:53

7 Adition in Binary Octal Hexadecimal Urdu Hindi

19:41

14 Priority Scheduling Preemptive CPU Scheduling Algorithm in Operating System Urdu Hindi

11:17

13 Priority Scheduling CPU Scheduling Algorithm in Operating System Urdu Hindi

31:09

4 Signed Number and Subtraction using Complements in DLD Urdu Hindi

29:25

5 Binary Code BCD 8421 2421 Excess 3 84 -2 -1

13:54

6 Binary Logic Truth Tables Boolean Expressions Logic gates in DLD Urdu Hindi

37:31

2 Number System Conversion of Fractional Number DLD Urdu Hindi

36:50

12 Shortest Remaining Time First SRTF CPU Scheduling Algorithm in Operating System Urdu Hindi