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Abelardo Pardo @UCFksG7xtzD42KCCyk3gUjHQ@youtube.com

13K subscribers - no pronouns :c

I am Professor and Head of School of Computer and Mathematic


11:45
Using Data to Provide Personalized Student Support
07:02
The space of actions
06:04
The space of data analysis
05:51
The space of logs
07:06
Ontask. A tool to provide personalised learning support actions
07:01
OnTask Pilot Study at University of South Australia
13:06
ELEC1601 Computer Systems -- Welcome Video
13:14
Subroutine Execution in AVR Assembly Code
11:28
Activation Block in an AVR Assembly Subroutine
12:20
Example of Subroutine Invocation
10:29
Translate an If-then-else statement to AVR assembly code
07:31
Translate a for statement to AVR assembly code
11:45
Translate a switch statement to AVR assembly code
08:50
Translate a while statement to AVR assembly code
10:02
AVR Addresing Modes: Data Indirect with Post-Inc, Pre-Dec, and Displacement
10:44
AVR Addressing Modes: Register Direct, Data Direct, Data Indirect
11:13
Creating an Assembly Program in the AVR Architecture
11:40
Example of an AVR Assembly Program
14:57
Data, Labels, Stack and Registers in an AVR Assembly Program
19:10
Subset of some AVR-8 machine instructions
14:03
AVR Instruction Format
13:00
CISC vs RISC architectures
09:22
Execution Cycle of the AVR Architecture
08:48
Block Diagram of the AVR Architecture
10:14
The Stack in a Microprocessor
07:57
Canonical Representation of a Boolean Function
09:34
From Boolean Expressions to Circuits
16:41
Logic Gates
10:31
Boolean Algebra
14:16
Encoding sets of symbols in binary
13:55
Encoding integers in sign and magnitude and 2s complement
14:44
Enconding on bases 10, 2, 8 and 16
04:15
TransitionMate: a mobile application for chronic illness interventions
04:12
Memory Indirection (the address of the address of...)
11:43
How tables are stored in computer memory
12:51
Memory in a computer system
01:44:37
How to deploy a Flipped Classroom
11:01
Hard Disk Drives
12:54
Input/Output architectures
09:40
Set associative cache
09:31
Associative cache memory
16:39
Direct mapped cache memory
07:35
Hardwired vs microprogrammed control
08:19
The MARIE architecture
14:50
How a datapath works inside a computer system
10:19
From a Finite State Machine to a Circuit
14:13
Finite State Machines explained
10:53
How a control unit works inside a CPU
11:18
How memory works in a computer system
14:58
Input/output subsystem in computer systems
12:56
How buses are used to connect multiple digital circuits
07:35
Encoding naturals and integers with binary bits
10:01
Sumary of the behavior of SR, JK and D flip-flops
04:39
Analysis of a sequential circuit with D and JK flip-flops
02:13
Learning Analytics workshop at the JTEL Summer School Estoril May 2012
01:05
Intervenciones derivadas de la analítica del aprendizaje
01:05
Interventions derived from learning analytics
02:08
La analítica del aprendizaje: observación
01:59
Learninng Analytics. Monitorization
28:58
Let me see... Analytics in learning environments