COMPUTER ORGANIZATION
223 videos • 45,336 views • by DIVVELA SRINIVASA RAO
1
Basic Functional Units of a Computer || Functional Units of Digital System || CO || COA || CA ||
DIVVELA SRINIVASA RAO
Download
2
Basic operational concepts of a computer || Basic Operational Concepts CO || CO || COA || CA
DIVVELA SRINIVASA RAO
Download
3
Computer Architecture(or) Computer Organization & Architecture Important Questions(Unit wise)
DIVVELA SRINIVASA RAO
Download
4
Computer Architecture Unit wise important questions| Computer Organization |
DIVVELA SRINIVASA RAO
Download
5
Difference between Computer Organization and Computer Architecture || Compare CO and CA || CO Vs CA
DIVVELA SRINIVASA RAO
Download
6
Difference Between Von Neumann Architecture and Harvard Architecture || CO || CA || COA || CAO ||
DIVVELA SRINIVASA RAO
Download
7
Register Transfer Language(RTL) || Register Transfer || Micro Operation || CO || CA || COA || CAO
DIVVELA SRINIVASA RAO
Download
8
REGISTER TRANSFER LANGUAGE | REGISTER TRANSFER | COMPUTER ORGANIZATION | COA
DIVVELA SRINIVASA RAO
Download
9
Bus Transfer Using Multiplexer || Bus System using Multiplexer || Bus and Memory Transfer | CA | CO
DIVVELA SRINIVASA RAO
Download
10
Bus Transfer using Tri-state Buffer || Bus Transfer using Three state Buffer || Three state Gate ||
DIVVELA SRINIVASA RAO
Download
11
Difference between Hardwired and Microprogrammed Control Unit || Computer Organization || CA || CAO
DIVVELA SRINIVASA RAO
Download
12
hardwired Control unit in computer organization || hardwired Control unit in Computer Architecture |
DIVVELA SRINIVASA RAO
Download
13
BOOTH'S ALGORITHM FOR BINARY INTEGER MULTIPLICATION
DIVVELA SRINIVASA RAO
Download
14
INSTRUCTION FORMAT, DIRECT AND INDIRECT ADDRESSING IN COMPUTER ORGANIZATION
DIVVELA SRINIVASA RAO
Download
15
PART-1: INSTRUCTION CYCLE IN COMPUTER ORGANIZATION
DIVVELA SRINIVASA RAO
Download
16
PART-2: INSTRUCTION CYCLE IN COMPUTER ORGANIZATION
DIVVELA SRINIVASA RAO
Download
17
PART-1: FLYNN'S CLASSIFICATION OF COMPUTERS | SISD | FLYNN'S CLASSIFICATION | COMPUTER ORGANIZATION
DIVVELA SRINIVASA RAO
Download
18
PART-2: FLYNN'S CLASSIFICATION OF COMPUTERS | SIMD | FLYNN'S CLASSIFICATION | COMPUTER ORGANIZATION
DIVVELA SRINIVASA RAO
Download
19
PART-3: FLYNN'S CLASSIFICATION OF COMPUTERS | MISD | FLYNN'S CLASSIFICATION | COMPUTER ORGANIZATION
DIVVELA SRINIVASA RAO
Download
20
PART-4: FLYNN'S CLASSIFICATION OF COMPUTERS | MIMD | FLYNN'S CLASSIFICATION | COMPUTER ORGANIZATION
DIVVELA SRINIVASA RAO
Download
21
1.PERFORM ADDITION AND SUBTRACTION OPERATIONS FOR THE FOLLOWING I) 5+4 II) 5-4 III)-5+4 IV) -5-4
DIVVELA SRINIVASA RAO
Download
22
2.PERFORM ADDITION AND SUBTRACTION OPERATIONS FOR THE FOLLOWING I) 5+4 II) 5-4 III)-5+4 IV) -5-4
DIVVELA SRINIVASA RAO
Download
23
Error Detecting Codes || Parity Bit Method || Odd Parity || Even Parity || Limitation of Parity Bit
DIVVELA SRINIVASA RAO
Download
24
Hamming Code || Error Detection Code || Error Correction Code || Introduction || DLD || STLD || CN|
DIVVELA SRINIVASA RAO
Download
25
7 Bit Hamming Code || Hamming Code Example || Hamming Code || Error Detection and Correction Code
DIVVELA SRINIVASA RAO
Download
26
9 Bit Hamming Code || Hamming Code Example || Hamming Code || Error Detection and Correction Code
DIVVELA SRINIVASA RAO
Download
27
11 Bit Hamming Code || Hamming Code Example || Hamming Code || Error Detection and Correction Code
DIVVELA SRINIVASA RAO
Download
28
12 Bit Hamming Code || Hamming Code Example || Hamming Code || Error Detection and Correction Code
DIVVELA SRINIVASA RAO
Download
29
20 Bit Hamming Code || Hamming Code Example || Hamming Code || Error Detection and Correction Code
DIVVELA SRINIVASA RAO
Download
30
Self Complementing Code || Excess 3 || 2421 || Digital logic design(DLD)|| STLD|| CO || DLD || DE
DIVVELA SRINIVASA RAO
Download
31
Reflective Code || Gray code || Digital logic design || Digital Electronics || DLD || STLD || CO
DIVVELA SRINIVASA RAO
Download
32
Cyclic Redundancy Code (Introduction to CRC) || CRC | Example Problem on Cyclic Redundancy Code | CN
DIVVELA SRINIVASA RAO
Download
33
Cyclic Redundancy Code (Example Problem) || Cyclic Redundancy Code || CRC || Error Detecting Codes
DIVVELA SRINIVASA RAO
Download
34
Example Problem on Cyclic Redundancy Code || Cyclic Redundancy Code || Error Detecting Codes || CN
DIVVELA SRINIVASA RAO
Download
35
Check Sum || Error Detecting Code || Example Problem on Check Sum || Computer Networks || CN
DIVVELA SRINIVASA RAO
Download
36
Example Problem on Check Sum || Check Sum || Error Detecting Code || Computer Networks || CN
DIVVELA SRINIVASA RAO
Download
37
DEMORGAN'S LAWS | BOOLEAN ALGEBRA | BOOLEAN ALGEBRA LAWS | DEMORGANS LAWS | DLD | STLD |
DIVVELA SRINIVASA RAO
Download
38
COMPLEMENTS | 1'S COMPLEMENT | 9'S COMPLEMENT | 2'S COMPLEMENT | 10'S COMPLEMENT | R'S COMPLEMENT |
DIVVELA SRINIVASA RAO
Download
39
PART-1 : 1'S COMPLEMENT SUBTRACTION | 1'S COMPLEMENT ADDITION | 1'S COMPLEMENT ARITHMETIC | DLD |
DIVVELA SRINIVASA RAO
Download
40
PART-2 : 1'S COMPLEMENT SUBTRACTION | 1'S COMPLEMENT ADDITION | 1'S COMPLEMENT ARITHMETIC | DLD |
DIVVELA SRINIVASA RAO
Download
41
PART-3 : 1'S COMPLEMENT SUBTRACTION | 1'S COMPLEMENT ADDITION | 1'S COMPLEMENT ARITHMETIC | DLD |
DIVVELA SRINIVASA RAO
Download
42
PART-1: 2'S COMPLEMENT SUBTRACTION | 2'S COMPLEMENT ADDITION | 2'S COMPLEMENT ARITHMETIC |DLD |STLD|
DIVVELA SRINIVASA RAO
Download
43
PART-2: 2'S COMPLEMENT SUBTRACTION | 2'S COMPLEMENT ADDITION | 2'S COMPLEMENT ARITHMETIC |DLD |STLD|
DIVVELA SRINIVASA RAO
Download
44
9'S COMPLEMENT | COMPLEMENTS | (r-1)'s COMPLEMENT | DIGITAL LOGIC DESIGN | DLD | STLD | CO |
DIVVELA SRINIVASA RAO
Download
45
9'S COMPLEMENT SUBTRACTION | 9'S COMPLEMENT ADDITION | 9'S COMPLEMENT ARITHMETIC | COMPLEMENTS |DLD|
DIVVELA SRINIVASA RAO
Download
46
10's Complement || r's Complement || Complements in Digital Electronics || DLD || STLD || CO ||
DIVVELA SRINIVASA RAO
Download
47
COMPUTER ORGANIZATION OBJECTIVE TYPE QUESTIONS | COMPUTER ORGANIZATION SHORT ANSWER QUESTIONS | CO
DIVVELA SRINIVASA RAO
Download
48
COMPUTER ORGANIZATION IMPORTANT DESCRIPTIVE AND SHORT ANSWER QUESTIONS | UNITWISE IMPORTANT QUESIONS
DIVVELA SRINIVASA RAO
Download
49
UNIT-1 COMPUTER ORGANIZATION NOTES | COMPUTER ORGANIZATION NOTES | COMPUTER ORGANIZATION | CO NOTES
DIVVELA SRINIVASA RAO
Download
50
UNIT-2 COMPUTER ORGANIZATION NOTES | COMPUTER ORGANIZATION NOTES | COMPUTER ORGANIZATION | CO NOTES
DIVVELA SRINIVASA RAO
Download
51
UNIT-3 COMPUTER ORGANIZATION NOTES | COMPUTER ORGANIZATION NOTES | COMPUTER ORGANIZATION | CO NOTES
DIVVELA SRINIVASA RAO
Download
52
UNIT-4 AND 5 COMPUTER ORGANIZATION NOTES | COMPUTER ORGANIZATION NOTES | COMPUTER ORGANIZATION |
DIVVELA SRINIVASA RAO
Download
53
UNIT-6 AND 7 COMPUTER ORGANIZATION NOTES | COMPUTER ORGANIZATION NOTES | COMPUTER ORGANIZATION |
DIVVELA SRINIVASA RAO
Download
54
UNIT-7 AND 8 COMPUTER ORGANIZATION NOTES | COMPUTER ORGANIZATION NOTES | COMPUTER ORGANIZATION |
DIVVELA SRINIVASA RAO
Download
55
COMPUTER ORGANIZATION AND ARCHITECTURE NOTES | COA NOTES | CO NOTES | COMPUTER ORGANIZATION NOTES |
DIVVELA SRINIVASA RAO
Download
56
COMPUTER ORGANIZATION & ARCHITECTURE IMPORTANT QUESTIONS | COMPUTER ORGANIZATION SHORT QUESTIONS |
DIVVELA SRINIVASA RAO
Download
57
COMPUTER ORGANIZATION NOTES | COMPUTER ARCHITECTURE NOTES | COMPUTER ORGANIZATION & ARCHITECTURE |
DIVVELA SRINIVASA RAO
Download
58
Flynn’s Classification | SISD | SIMD | MISD | MIMD | Flynn’s Classification of Computers | CO | COA
DIVVELA SRINIVASA RAO
Download
59
DIRECT AND INDIRECT ADDRESSING | DIRECT ADDRESSING | INDIRECT ADDRESSING | INSTRUCTION FORMAT | COA
DIVVELA SRINIVASA RAO
Download
60
Memory Hierarchy || Memory Hierarchy in Computer Architecture & Computer Organization || CO | COA
DIVVELA SRINIVASA RAO
Download
61
What is Addressing Mode || Various Types of Addressing Modes || Classification of Addressing Modes
DIVVELA SRINIVASA RAO
Download
62
ADDRESSING MODES || NUMERICAL EXAMPLE ON ADDRESSING MODES || COA || COMPUTER ORGANIZATION || CA ||
DIVVELA SRINIVASA RAO
Download
63
ADDRESSING MODES || NUMERICAL EXAMPLE ON ADDRESSING MODES || COA || COMPUTER ORGANIZATION || CA ||
DIVVELA SRINIVASA RAO
Download
64
instruction codes in computer architecture || Instruction Codes || COA || Instruction Code || CO
DIVVELA SRINIVASA RAO
Download
65
Stored Program Organization In Computer Architecture || Stored Program Organization || COA || CO
DIVVELA SRINIVASA RAO
Download
66
INSTRUCTION CODES || STORED PROGRAM ORGANIZATION || DIRECT AND INDIRECT ADDRESSING || COA || CO | CA
DIVVELA SRINIVASA RAO
Download
67
computer registers in computer architecture || Various General Purpose Registers || COA || CO || CA
DIVVELA SRINIVASA RAO
Download
68
COMMON BUS SYSTEM || COMPUTER REGISTERS || COMPUTER ARCHITECTURE || COMPUTER ORGANIZATION || COA ||
DIVVELA SRINIVASA RAO
Download
69
Performance of a Computer || Evaluate Computer performance || Performance Measures of CPU ||
DIVVELA SRINIVASA RAO
Download
70
Half Adder and Half Subtractor || Implementing Half Adder and Half Subtractor using NAND & NOR gates
DIVVELA SRINIVASA RAO
Download
71
Full Adder || Designing of Full Adder || Full Adder using NAND & NOR || Full Adder using Half Adder
DIVVELA SRINIVASA RAO
Download
72
Booth's Algorithm || Booth's Algorithm With Example || Booths Algorithm || CO || COA ||
DIVVELA SRINIVASA RAO
Download
73
Booth's Algorithm With Example( -9 * -13) || Booth's Algorithm || Booths Algorithm || CO || COA ||
DIVVELA SRINIVASA RAO
Download
74
Booth's Algorithm With Example( -9 * 13) || Booth's Algorithm || Booths Algorithm || CO || COA ||
DIVVELA SRINIVASA RAO
Download
75
Booth's Algorithm With Example( 9 * -13) || Booth's Algorithm || Booths Algorithm || CO || COA ||
DIVVELA SRINIVASA RAO
Download
76
Booth's Algorithm With Example( 9 * 13) || Booth's Algorithm || Booths Algorithm || CO || COA ||
DIVVELA SRINIVASA RAO
Download
77
Cache Memory || Cache Mapping Techniques || Direct Mapping | Associative and Set Associative Mapping
DIVVELA SRINIVASA RAO
Download
78
Booth's Algorithm With Example( -3 * -5) || Booth's Algorithm || Booths Algorithm || CO || COA ||
DIVVELA SRINIVASA RAO
Download
79
Introduction to Cache Memory || Cache Memory || Purpose and Significance of Cache Memory | CO | COA
DIVVELA SRINIVASA RAO
Download
80
Associative Mapping || Cache Mapping Techniques || Cache Memory || CO || COA ||
DIVVELA SRINIVASA RAO
Download
81
Direct Mapping || Direct Mapping with example || Cache Mapping Techniques || Cache Memory || CO ||
DIVVELA SRINIVASA RAO
Download
82
Set Associative Mapping || 2-way Set Associative Mapping || Cache Mapping Techniques || CO || CAO
DIVVELA SRINIVASA RAO
Download
83
Arithmetic Pipeline || Pipelining || Arithmetic Pipeline in Computer Organization & Architecture ||
DIVVELA SRINIVASA RAO
Download
84
Memory Interleaving || Memory Interleaving in computer architecture || interleaved memory | CO | COA
DIVVELA SRINIVASA RAO
Download
85
Direct Memory Access(DMA) || DMA Controller || DMA Transfer || DMA || CA || CO || COA || CAO
DIVVELA SRINIVASA RAO
Download
86
Direct Memory Access(DMA) || Introduction to Direct Memory Access || What is DMA || CO || CA || COA
DIVVELA SRINIVASA RAO
Download
87
DMA controller || Direct Memory Access ( DMA ) Controller in Computer Organization Architecture | CO
DIVVELA SRINIVASA RAO
Download
88
DMA Transfer || Direct Memory Access ( DMA ) Transfer in Computer Organization Architecture || COA
DIVVELA SRINIVASA RAO
Download
89
Difference Between RISC And CISC Processor || RISC and CISC in computer architecture || RISC vs CISC
DIVVELA SRINIVASA RAO
Download
90
RISC and CISC architecture || Characteristics of RISC and CISC || COA | CO | CA
DIVVELA SRINIVASA RAO
Download
91
RISC and CISC architecture || Characteristics of RISC and CISC || COA | CO | CA
DIVVELA SRINIVASA RAO
Download
92
RISC vs CISC || CISC vs RISC || Difference Between RISC and CISC || RISC and CISC Architecture ||
DIVVELA SRINIVASA RAO
Download
93
r's Complement || Formula for r's Complement || 10's Complement || 2's Complement || DLD || STLD ||
DIVVELA SRINIVASA RAO
Download
94
r's Complement || 8's Complement || 6's Complement || Formula for r's Complement || DLD || STLD ||
DIVVELA SRINIVASA RAO
Download
95
r's Complement || (r-1)'s Complement || Formula for r's and (r-1)'s Complements || DLD || STLD || DE
DIVVELA SRINIVASA RAO
Download
96
Hamming Code || Hamming code for error detection and correction || Hamming code example(4-bit)
DIVVELA SRINIVASA RAO
Download
97
Hamming Code || Hamming code for error detection and correction || Hamming code example(4-bit)
DIVVELA SRINIVASA RAO
Download
98
What is even parity and odd parity || What is Parity in Digital Electronics with Example || Parity
DIVVELA SRINIVASA RAO
Download
99
Hamming Code || Hamming code for error detection and correction || Hamming code example(4-bit)
DIVVELA SRINIVASA RAO
Download
100
Boolean Functions || Boolean function to truth table || Complement of a Boolean Function ||
DIVVELA SRINIVASA RAO
Download
101
Show that the dual of the exclusive‐OR is equal to its complement || Dual and Complement ||
DIVVELA SRINIVASA RAO
Download
102
BCD Adder || Decimal Adder || Design of BCD Adder || BCD Adder Circuit diagram || BCD adder example
DIVVELA SRINIVASA RAO
Download
103
Operator Precedence for evaluating Boolean Expressions || Operator Precedence in Boolean algebra
DIVVELA SRINIVASA RAO
Download
104
Hexadecimal to Binary, Octal and Decimal Conversions | Hexadecimal to Octal | Hexadecimal to Decimal
DIVVELA SRINIVASA RAO
Download
105
Binary to Decimal Conversion || Binary to Octal Conversion || Binary to Hexadecimal Conversion
DIVVELA SRINIVASA RAO
Download
106
Binary Number System || Decimal Number System || Octal Number System || Hexadecimal Number System
DIVVELA SRINIVASA RAO
Download
107
Hamming Code || Hamming code for error detection and correction || Hamming code example(7 & 10-bits)
DIVVELA SRINIVASA RAO
Download
108
Sign Magnitude Representation | Signed 1's Complement Representation | 2's Complement Representation
DIVVELA SRINIVASA RAO
Download
109
Difference between Serial Adder and Parallel Adder || Compare Serial Adder and Parallel Adder || DLD
DIVVELA SRINIVASA RAO
Download
110
Memory Transfer in Computer Architecture || Memory Transfer in Computer Organization ||
DIVVELA SRINIVASA RAO
Download
111
Hardware Implementation of Shift Microoperations || 4 Bit Combinational Circuit Shifter || CO || CA
DIVVELA SRINIVASA RAO
Download
112
Arithmetic Microoperations || Arithmetic micro operations in computer architecture ||
DIVVELA SRINIVASA RAO
Download
113
Binary Adder || Arithmetic Microoperations || Binary Parallel Adder || Ripple Carry Adder || CA | CO
DIVVELA SRINIVASA RAO
Download
114
Binary Subtractor || Arithmetic Microoperations || Parallel Binary Subtractor || CA || CO || CAO
DIVVELA SRINIVASA RAO
Download
115
Binary Adder Subtractor || Binary Adder - Subtractor || 4 Bit Binary Adder Subtractor || CA || CO ||
DIVVELA SRINIVASA RAO
Download
116
Binary Incrementor || 4 Bit Binary Incrementor || Arithmetic Microoperations || CO || CA || STLD ||
DIVVELA SRINIVASA RAO
Download
117
Arithmetic Circuit || 4 Bit Arithmetic Circuit || Arithmetic Microoperations || Microoperations ||
DIVVELA SRINIVASA RAO
Download
118
Logic Microoperations || Hardware Implementation of Logic Microoperations || CO || CA || COA ||
DIVVELA SRINIVASA RAO
Download
119
Applications of Logic Microoperations || Logic Microoperations || Microoperations || CO || CA | COA
DIVVELA SRINIVASA RAO
Download
120
Shift Microoperations || Types of Shift Microoperations || Hardware Implementation || CA || CO | COA
DIVVELA SRINIVASA RAO
Download
121
Arithmetic Logic Shift Unit || Arithmetic Logic Shift Unit Circuit diagram and Function Table || CA
DIVVELA SRINIVASA RAO
Download
122
Instruction Cycle in Computer Organization || Instruction Cycle in Computer Architecture || COA
DIVVELA SRINIVASA RAO
Download
123
Instruction Cycle in Computer Architecture || Instruction Cycle in Computer Organization || CA || CO
DIVVELA SRINIVASA RAO
Download
124
Computer Instructions || Types of Instructions || Instruction Set Completeness || CA || CO || CAO ||
DIVVELA SRINIVASA RAO
Download
125
Instruction Format || Single Accumulator Organization || Stack Organization || Register Organization
DIVVELA SRINIVASA RAO
Download
126
Instruction Formats (Zero, One, Two and Three Address Instruction) || What is Instruction Format ||
DIVVELA SRINIVASA RAO
Download
127
Bus Transfer Using Multiplexer || Bus System using Multiplexer || Bus and Memory Transfer | CA | CO
DIVVELA SRINIVASA RAO
Download
128
Bus Transfer using Tri-state Buffer || Bus Transfer using Three state Buffer || Three state Gate ||
DIVVELA SRINIVASA RAO
Download
129
Hardwired Control Unit || Hardwired Control Unit in Computer Architecture || Computer Organization
DIVVELA SRINIVASA RAO
Download
130
Stack Organization || Memory Stack || Register Stack || RPN || Evaluating Arithmetic Expressions
DIVVELA SRINIVASA RAO
Download
131
Stack Organization || Register Stack || Memory Stack || RPN || Evaluating Arithmetic Expressions
DIVVELA SRINIVASA RAO
Download
132
Stack Organization || Evaluating Arithmetic Expressions || Register Stack || Memory Stack || CO | CA
DIVVELA SRINIVASA RAO
Download
133
Stack Organization || Register Stack || Memory Stack || RPN || Evaluating Arithmetic Expressions
DIVVELA SRINIVASA RAO
Download
134
Data Transfer Instructions || Data Transfer Instructions in Computer Organization and Architecture
DIVVELA SRINIVASA RAO
Download
135
Data Manipulation Instructions || Data Manipulation Instructions in Computer Architecture | CO | CA
DIVVELA SRINIVASA RAO
Download
136
Program Control Instructions (Types of Control Instructions) || Computer Organization ||
DIVVELA SRINIVASA RAO
Download
137
Status Bit Conditions || Condition Code Bits || Flag Bits || Status Bits || Program Control || CO
DIVVELA SRINIVASA RAO
Download
138
Subroutine Call and Return || Program Control || Computer Organization || Computer Architecture
DIVVELA SRINIVASA RAO
Download
139
Program Interrupt and its Types || Interrupt || Program Interrupt in Computer Architecture | CO | CA
DIVVELA SRINIVASA RAO
Download
140
What is Program Interrupt || Types of Interrupts || Program Interrupt in Computer Architecture | CA
DIVVELA SRINIVASA RAO
Download
141
Input-Output Configuration || Input Output Configuration in Computer Architecture || CO || CA || COA
DIVVELA SRINIVASA RAO
Download
142
Input-Output Instructions || Input Output Instructions in Computer Architecture || CO || CA || COA
DIVVELA SRINIVASA RAO
Download
143
Interrupt Cycle in Computer Architecture || Interrupt Cycle in Computer Organization | CO | CA | COA
DIVVELA SRINIVASA RAO
Download
144
Addition and Subtraction with Signed Magnitude Data || Computer Architecture | Computer Organization
DIVVELA SRINIVASA RAO
Download
145
Addition and Subtraction with Signed Magnitude Data || Hardware Implementation || CO || CA || COA
DIVVELA SRINIVASA RAO
Download
146
Flowchart(Algorithm) of Addition and Subtraction with Signed Magnitude Data || CO || CA || COA
DIVVELA SRINIVASA RAO
Download
147
Addition and Subtraction with Signed 2's Complement Data || Flowchart & Hardware Implementation
DIVVELA SRINIVASA RAO
Download
148
Parallel Processing || Serial vs Parallel Processing || Flynn's Classification || CO || CA
DIVVELA SRINIVASA RAO
Download
149
Introduction to Parallel Processing || Serial vs Parallel Processing || Flynn's Classification || CA
DIVVELA SRINIVASA RAO
Download
150
Pipelining in Computer Architecture || Four Segment Pipeline || What is pipelining || CO || CA | COA
DIVVELA SRINIVASA RAO
Download
151
Instruction Pipeline || Four Segment Instruction Pipeline || Computer Organization and Architecture
DIVVELA SRINIVASA RAO
Download
152
Difference Between Static RAM and Dynamic RAM || Compare SRAM and DRAM || SRAM Vs DRAM
DIVVELA SRINIVASA RAO
Download
153
Difference between flash drive and hard disk drive || hard disk drive vs flash drive ||
DIVVELA SRINIVASA RAO
Download
154
Pipeline Conflicts || Pipeline Hazards || Pipeline Hazards and its types || Hazards || CO | CA | COA
DIVVELA SRINIVASA RAO
Download
155
Pipeline Hazards || Pipeline Conflicts || Pipeline Hazards and its types || Hazards || CO | CA | COA
DIVVELA SRINIVASA RAO
Download
156
Difference between Synchronous and Asynchronous transmission | Synchronous Vs Asynchronous | CA | CN
DIVVELA SRINIVASA RAO
Download
157
Difference between Synchronous and Asynchronous transmission | Synchronous Vs Asynchronous | CA | CN
DIVVELA SRINIVASA RAO
Download
158
Memory Hierarchy in Computer Architecture || Memory Hierarchy in Computer Organization || CO || CA
DIVVELA SRINIVASA RAO
Download
159
Memory Connection to the CPU || Main Memory || RAM Chip || ROM Chip || Computer Architecture || CO
DIVVELA SRINIVASA RAO
Download
160
RAM and ROM Chips || Main Memory || RAM Chip || ROM Chip || Memory Connection to CPU || CO || CA ||
DIVVELA SRINIVASA RAO
Download
161
Memory Address Map || RAM and ROM Chips || Main Memory || Memory Connection to CPU || CO || CA | COA
DIVVELA SRINIVASA RAO
Download
162
Main Memory || RAM and ROM Chips || Memory Address Map || Memory Connection to CPU || CO || CA | COA
DIVVELA SRINIVASA RAO
Download
163
Direct Memory Access (DMA) || Burst Transfer || Cycle Stealing || Modes of DMA Transfer || DMA || CA
DIVVELA SRINIVASA RAO
Download
164
Input Output Configuration || Input Output Instructions || Interrupt Cycle || Program Interrupt | CO
DIVVELA SRINIVASA RAO
Download
165
Auxiliary Memory || Magnetic Disk || Secondary Memory || Secondary Storage devices || CO || CA | COA
DIVVELA SRINIVASA RAO
Download
166
Auxiliary Memory || Magnetic Tape ||Secondary Memory || Secondary Storage devices || CO || CA || COA
DIVVELA SRINIVASA RAO
Download
167
Difference between Magnetic Tape and Magnetic Disk || Compare Magnetic tape and Magnetic disk || CO
DIVVELA SRINIVASA RAO
Download
168
Associative Memory in Computer Organization and Architecture || Hardware Organization || CO || CA ||
DIVVELA SRINIVASA RAO
Download
169
Associative Memory || Computer Organization || Computer Architecture || Associative || CO | CA | COA
DIVVELA SRINIVASA RAO
Download
170
Main Memory || RAM and ROM Chips || Memory Address Map || Memory Connection to CPU || CO || CA | COA
DIVVELA SRINIVASA RAO
Download
171
Auxiliary Memory || Magnetic Tape || Magnetic Disk || Computer Organization || Computer Architecture
DIVVELA SRINIVASA RAO
Download
172
Difference between Isolated I/O and Memory mapped I/O || Isolated I/O Vs Memory mapped I/O || COA
DIVVELA SRINIVASA RAO
Download
173
Isolated I/O vs Memory mapped I/O || Difference between Isolated I/O and Memory mapped I/O || CO ||
DIVVELA SRINIVASA RAO
Download
174
Floating Point Representation (IEEE 754) || Example-1 || Floating point representation || CO || CA
DIVVELA SRINIVASA RAO
Download
175
Floating Point Representation (IEEE 754) || Example-2 || Floating point representation || CO || CA
DIVVELA SRINIVASA RAO
Download
176
Floating Point Representation (IEEE 754) || Example-3 || Floating point representation || CO || CA
DIVVELA SRINIVASA RAO
Download
177
Floating Point Representation (IEEE 754) || Example-4 || Floating point representation || CO || CA
DIVVELA SRINIVASA RAO
Download
178
Floating Point Representation (IEEE 754) || Example-5 || Floating point representation || CO || CA
DIVVELA SRINIVASA RAO
Download
179
Floating Point Representation (IEEE 754) || Example-6 || Floating point representation || CO || CA
DIVVELA SRINIVASA RAO
Download
180
Floating Point Representation (IEEE 754) || Example-7 || Floating point representation || CO || CA
DIVVELA SRINIVASA RAO
Download
181
Floating Point Representation (IEEE 754) || IEEE 754 Single and Double Precision Formats | CO | CA
DIVVELA SRINIVASA RAO
Download
182
Multiplication Algorithm || Hardware Implementation || Multiplication Example || CO || COA ||
DIVVELA SRINIVASA RAO
Download
183
Multiplication Algorithm || Flowchart for Multiplication Algorithm with Example || CO || COA ||
DIVVELA SRINIVASA RAO
Download
184
Multiplication Algorithm || Flowchart || Hardware Implementation || Example || Computer Organization
DIVVELA SRINIVASA RAO
Download
185
Privileged and Non-Privileged Instructions || User Mode and Kernel Mode || CO || CA || COA || OS
DIVVELA SRINIVASA RAO
Download
186
Carry Look ahead Adder(CLA Adder) || Advantages and Disadvantages || Ripple Carry Adder || DLD || CO
DIVVELA SRINIVASA RAO
Download
187
Carry Look ahead Adder(4-Bit) || Advantages and Disadvantages || Ripple Carry Adder | DLD | CO | CA
DIVVELA SRINIVASA RAO
Download
188
Division Algorithm || Restoring Division Algorithm || Flowchart for Restoring Division Algorithm
DIVVELA SRINIVASA RAO
Download
189
Division Algorithm || Restoring Division Algorithm || Flowchart for Restoring Division Algorithm
DIVVELA SRINIVASA RAO
Download
190
Division Algorithm || Non-Restoring Division Algorithm || Flowchart || Example || CO || CA || COA
DIVVELA SRINIVASA RAO
Download
191
Division Algorithm || Non-Restoring Division Algorithm || Flowchart || Example || CO || CA || COA
DIVVELA SRINIVASA RAO
Download
192
Difference Between Restoring and Non-Restoring Division Algorithms || Restoring Vs Non-Restoring ||
DIVVELA SRINIVASA RAO
Download
193
ROM || Types of ROM(Read Only Memory) || MROM || PROM || EPROM || EEPROM || Flash Memory
DIVVELA SRINIVASA RAO
Download
194
Difference Between RAM and ROM || RAM Vs ROM || Compare RAM and ROM || RAM versus ROM || RAM || ROM
DIVVELA SRINIVASA RAO
Download
195
ROM(Read Only Memory) || Types of ROM || MROM || PROM || EPROM || EEPROM || Flash Memory || CA | DLD
DIVVELA SRINIVASA RAO
Download
196
Fixed Point Representation || Sign Magnitude Representation || 1's Complement || 2's Complement | CA
DIVVELA SRINIVASA RAO
Download
197
Design of Accumulator Logic || Accumulator Logic || Computer Architecture || Computer Organization
DIVVELA SRINIVASA RAO
Download
198
Control Memory || Microprogrammed Control Organization || Microprogrammed Control Unit || CA || COA
DIVVELA SRINIVASA RAO
Download
199
Microprogrammed Control Organization || Microprogrammed Control Unit || Control Memory || CA || COA
DIVVELA SRINIVASA RAO
Download
200
Difference Between Hardwired Control Unit and Microprogrammed Control Unit || CA || CO || COA
DIVVELA SRINIVASA RAO
Download