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Microelectronics @UChyfTGP8vb8BFiJASCUQj4Q@youtube.com

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Tony Chan Carusone has taught and researched microelectronic


14:07
32 Charge Pumps
48:15
Co-Packaged Optics for our Connected Future
17:51
Modelling Equalization with SerDesPy
16:13
Simple Channel Modeling Example with SerDesPy
14:15
Introduction to SerDesPy
02:59
CMOS 160Gbps 4PAM Optical Receiver Front-End
19:37
Deep-Dive: 112Gbps 16nm CMOS TIA with Co-Packaged Photodiodes
14:51
Injection-Locked Phase Rotator
02:04
Demo: 112 Gbps 4-PAM 16nm FinFET CMOS TIA
30:38
Low-Jitter CMOS Clock Distribution
11:05
Feedforward Compensation Example
08:02
DC Characteristics of 45nm NMOS
04:34
Common Source Gain-Bandwidth Tradeoffs
31:21
04 IC Passives
32:53
11 Single Stage Opamp Basics
23:02
16 Noise Time Domain Analysis
42:54
01 MOS Square Law and Parasitics
09:40
02 MOSFET as a Switch
36:57
27 CMOS Comparator Operation
38:16
28 Comparator Specs and Characterization
37:55
21 Nonlinearity and Dynamic Range
55:28
24 Biasing Circuits
47:34
23 Fully Differential Analog Circuits
37:45
29 Electronic Oscillators
52:49
31 Integer N Charge Pump PLL Basics
28:13
13 Other Single Stage Op Amps
24:15
17 Introduction to Noise
01:11:01
30 Jitter and Phase Noise in Oscillators
56:49
06 Analog amplifier biasing and mismatch
40:25
33 PLL Linear Analysis and Design Procedure
33:06
20 Noise in Single Stage Op Amps
22:27
18 Input Referred Noise
32:50
10 Feedback Amplifiers Stability and Compensation Basics
24:21
12 Slew Rate and Offset
18:09
19 Common Source and Cascode Stages Noise
14:45
Discrete Multitone Signaling for Wireline Communication - ISCAS 2020
18:37
05 Mismatch
39:22
26 Regulators
41:03
09 Feedback Amplifiers Basics
55:45
08 Feedback Stability Analysis
13:18
35 ILOs
49:31
03 Advanced MOS Modeling
13:56
All-Digital Calibration Algorithms to Correct for Static Non Linearities in ADCs - ISCAS 2020
15:26
34 DLLs
45:03
14 Two Stage Op Amps
17:55
15 Two Stage Opamp Compensation
50:22
07 Feedback Preliminaries - Finding the Loop Gain
39:44
25 Reference Circuits
12:42
22 Low Noise and Variable Gain Amplifiers
31:24
Integrated Broadband Analog Delay Circuits Part III
43:33
Integrated Broadband Analog Delay Circuits Part II
37:12
Integrated Broadband Analog Delay Circuits Part I
14:35
All-Digital Calibration Algorithms to Correct Static Non-Linearities in ADCs
15:42
Pre-FEC and Post-FEC BER as Criteria for Optimizing Wireline Transceivers
30:53
How to Draw Perfect Schematics
55:23
FinFET Technologies for Analog Design
04:35
Optical and Electrical Transceivers for 400GbE and Beyond: ISSCC 2021 Forum Introduction
22:52
10 The Inverting Configuration
03:39
Microelectronic Circuits, 8th Edition: Authors Interviews
13:20
16 Finite Open Loop Gain and Bandwidth