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🔥 Welcome to 10Xpreparation: Your Ultimate VLSI and Digital


10:14
Overlapping Moore Type FSM: Detecting Multiple 1's in Last 3 Samples | VLSI Interview Questions
08:26
VLSI Interview Questions | Implementing 16:1 MUX using 5:1 MUX and 5:1 MUX using 2:1 MUX
08:36
VLSI Interview Questions: Designing a BCD Adder Circuit Using Binary Adder
05:51
VLSI Interview Questions: Crafting a Smart 9's Complement Circuit Using Binary Adder
07:11
VLSI Interview Questions: Designing a Smart 4-Bit Subtractor Unit with Comparator and Adder
10:01
VLSI Interview Questions: Design an Adder/Subtractor Unit with Overflow Detection
02:27
VLSI Interview Question | Absolute Value Circuit for 4-Bit Numbers | digital design circuit
07:12
VLSI Interview Questions : Counting 1's in a 5-Bit Input | Clever Logic Design Technique
09:16
Mastering VLSI Interview Concepts: Full Adder, Full Subtractor, and Majority Function with 4:1 Mux
08:07
VLSI Interview Prep: Mux Size Reduction Technique with a Single Inverter
09:44
VLSI Interview Mastery: Implementing 16x1 Mux with 8:1 Mux and 2:1 Mux | 10x1 Mux with 4x1 Mux
09:15
VLSI Interview Prep: Implementing Basic Gates using 2:1 Mux | Step-by-Step Tutorial
08:07
Mastering VLSI Interviews: Implementing Various Mux Sizes using 2:1 Mux | Advanced Tutorial
05:10
VLSI Interview Prep : 2:1 Mux Implementation using AND-OR and NAND Gates | Crack the Interview!
06:11
Sequence detector | finite state machine | vlsi interview question
15:41
Q 5 - Duty cycle | ISRO 2013 Solution | ISRO Electronics Previous Year Paper | ISRO Scientist
05:39
Q24 | ISRO 2013 Solution Electronics | ISRO Scientist | ISRO Electronics Previous Year Paper
08:40
Q7 | ISRO 2013 Solution Electronics | ISRO Scientist | ISRO Electronics Previous Year Paper
03:13
Q69 | ISRO 2013 Solution Electronics | ISRO Scientist | ISRO Electronics Previous Year Paper
03:52
Q63 | ISRO 2013 Solution Electronics | ISRO Scientist | ISRO Electronics Previous Year Paper
03:51
Q71 ISRO 2014 Solutions Electronics | ISRO Scientist / Engineer-SC Electronics Previous Year Paper
03:41
Q66 ISRO 2014 Solutions Electronics | ISRO Scientist / Engineer-SC Electronics Previous Year Paper
06:26
Q61 ISRO 2014 Solutions Electronics | ISRO Scientist / Engineer-SC Electronics Previous Year Paper
03:11
ISRO 2014 Solutions Electronics | ISRO Scientist / Engineer-SC Electronics Previous Year Paper | Q52
04:52
ISRO 2014 Solutions Electronics | ISRO Scientist / Engineer-SC Electronics Previous Year Paper | Q47
06:51
ISRO 2014 Solutions Electronics | ISRO Scientist / Engineer-SC Electronics Previous Year Paper | Q37
03:37
ISRO 2014 Solutions Electronics | ISRO Scientist / Engineer-SC Electronics Previous Year Paper | Q3
07:51
ISRO 2014 Solutions Electronics | ISRO Scientist / Engineer-SC Electronics Previous Year Paper | Q1
02:37
Electrical utilities BEE Previous year papers | Paid video solutions
27:34
Electrical utility 2017 PYQ part 1 | BEE PREVIOUS YEAR VIDEO SOLUTION | EESL
19:54
Electrical utility 2018 PYQ part 2 | BEE PREVIOUS YEAR VIDEO SOLUTION | EESL
49:43
Electrical utility 2019 PYQ | BEE PREVIOUS YEAR VIDEO SOLUTION | EESL
14:24
EESL Exam syllabus | preparation paid course details
02:32
TEACHER'S DAY MESSAGE | KARTIK BHARDWAJ
21:33
key points of thevenins and nortons theorem a| Basics of Network Theory | EESL | GATE | ESE | PSU
24:22
key points of superposition theorem | Basics of Network Theory | EESL | GATE | ESE | PSU
26:27
PREVIOUS YEAR QUESTIONS | ESE | Basics of Network Theory | EESL | GATE | ESE | PSU
31:52
PREVIOUS YEAR QUESTIONS | ESE | Basics of Network Theory | EESL | GATE | ESE | PSU
25:04
DATA INTERPRETATION | APTITUDE | PREVIOUS YEAR QUESTIONS | GATE
15:41
PREVIOUS YEAR QUESTIONS | ESE | Basics of Network Theory | EESL | GATE | ESE | PSU
28:46
DATA INTERPRETATION | APTITUDE | PREVIOUS YEAR QUESTIONS | GATE
19:24
summery of mesh and node analysis | Rating concepts | Network Theory | EESL | GATE | ESE | PSU
14:13
Introduction of data interpretation | aptitude lectures
39:23
KVL | VOLTAGE DIVIDER | SATR DELTA FORMULAS | Basics of Network Theory | EESL | GATE | ESE | PSU
31:33
source transformation | Balance bridge | KCL | CURRENT DIVIDER RULE | EESL | GATE | ESE | PSU
36:45
Ohm's law and its limitations | Basics of Network Theory | EESL | GATE | ESE | PSU
28:07
Voltage and current source connections | basics of network | EESL | GATE | ESE | PSU
24:27
ideal and practical voltage , current sources | basics of network | EESL | GATE | ESE | PSU
22:14
Basics terms of network | EESL | GATE | ESE | PSU
12:47
Basic Electrical | Basic Network | EESL | GATE | ESE
03:24
Big announcement for GATE / ESE serious aspirants | membership
13:29
Understanding Inhibitors in Logic Gates | Digital Electronics Explained
30:48
Logic Gates Minimization Techniques: Tips and Concepts | Digital Electronics
18:08
Universal Logic Gates: NAND and NOR | Logic Gates in Digital Electronics
15:37
XNOR Gates | Logic Gates in Digital Electronics
18:56
XOR Gates | Exploring Logic Gates in Digital Electronics
10:23
NOR Gates | Exploring Logic Gates in Digital Electronics
08:49
NAND Gates | Logic Gates Fundamentals
04:23
Introduction and syllabus | semiconductor memory | Digital Electronics | GATE 2021
02:58
Introduction and syllabus | Logic families | Digital Electronics | GATE 2021