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Knowledge Unlimited @UCYPxhm9WaoVlOHqOsqVWtDA@youtube.com

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M.Tech in NIT trichy ( VLSI Systems) Gold medalist 🏅 Marks


47:30
Analog Electronics lecture 6 Eng & Telugu/ Op-amp-1/ Google meet live sessions
01:07:44
Analog Electronics lecture 5 Eng & Telugu/ Diode circuits-2 (Google meet live sessions)
01:01:41
Analog electronics lecture 4 Eng & Telugu / Diode circuits-1/ ( Google meet live sessions)
01:27:17
Boolean algebra ACE notes revision / Google meet live sessions(Eng & Tel)
09:59
Op amp detailed introduction / current summing and voltage summing nodes
01:19
IISc Bangalore MS research interview experience/promo
10:19
General Configuration of negative(-ve) feedback circuits.
01:23:31
Analog electronics lecture 3 Eng&Telugu (Google meet live sessions)
01:25:01
Analog electronics lecture 2 Eng&Telugu ( Google meet live sessions)
52:55
Analog electronics lecture 1 Eng&Telugu ( Google meet live session )
04:22
Analog(BJT) Numerical question
07:50
Compensating resistance Analog Numerical question solved
05:53
Miller's theorem & Miller resistances
06:53
Positive feedback analog numerical solved - GATE 2020
02:06
Simulation of negative resistance
01:55
Bootstrap circuit
06:06
Justification to explain MOSFET can be used as an Amplifier
12:08
Amplifiers numerical question
04:59
Thevenin's resistance using VI method - numerical question
10:14
Transresistance Amplifier- CCVS( Current Controlled voltage source)
07:09
Transconductance Amplifier- VCCS( voltage controlled current source)
07:23
Current Amplifier-CCCS(Current Controlled Current Source)
08:12
Voltage amplifier - VCVS ( voltage controlled voltage source)
13:24
All about Amplifiers
24:38
GATE preparation strategy to get below AIR 1000 / tips to crack gate in 1 st attempt
19:28
Vlotage division and current division short cut techniques (VDR & CDR)
10:29
Op amp as a black box
03:30
Medha servo drives pvt.ltd // how I got selected // tips to crack it
03:21
NPTEL certification without watching videos || Tips to get good percentage
05:22
Veda IIT Analog design - How I got selected in Veda IIT as analog design engineer|| tips to crack it
07:02
PN junction diode under no Bias/ equilibrium case
13:20
Drift and Diffusion current
09:47
How oscillator circuit is producing output?
09:11
What is operating / Q-point and why is it important?
18:33
Matched filter - High signal to noise ratio filter
06:50
Wein bridge circuit - AC bridge
06:27
Schering bridge - AC bridge
12:17
Anderson bridge - AC bridge
06:08
Maxwell's inductance capacitance bridge
05:14
Maxwell's inductance bridge - AC bridge
07:36
Kelvin's bridge - DC bridge
08:02
Wheatstone bridge - DC bridge
07:00
Why DC bias required?
04:05
Synchronous counter analysis - 2
04:58
Synchronous counter analysis
14:42
MOD 6 synchronous up counter design
10:58
Synchronous 2 bit down counter and Up-down counter
09:43
Introduction to counters and 2 bit synchronous up counter
15:24
What exactly is a FLIP FLOP? Background behind flip-flop
10:30
D flip-flop to JK flip-flop conversion
07:46
JK flip-flop to T flip-flop conversion
12:06
SR to JK flip-flop conversion : sequential circuits
07:47
T-flip-flop : sequential circuits
05:56
JK flip-flop : sequential circuits
03:57
D flip flop - sequential circuits
09:13
SR flip flop - sequential circuits
07:53
D-latch, JK latch, T latch - sequential circuits
12:35
SR LATCH - sequential circuits
10:04
NAND based memory element, why Latches?
15:16
NOR based memory element - Sequential circuits introduction